clock pulse
英 [klɒk pʌls]
美 [klɑːk pʌls]
时钟脉冲，定时脉冲
双语例句
- Two Phase Non-Overlap Clock Generator with Independent Pulse Width Adjusting
一种独立调节两相脉宽的不交叠时钟产生电路 - After the stop bit is received, the device will acknowledge the received byte by bringing the Data line low and generating one last clock pulse.
在收到停止位之后，设备将通过拉低数据线，生成最后一个时钟脉冲来应答收到的字节。 - If the host does not release the Data line after the11th clock pulse, the device will continue to generate clock pulses until the the Data line is released ( the device will then generate an error.)
在第11个时钟脉冲之后，如果主机并没有释放数据线，设备将继续产生时钟脉冲，直到数据线被释放（然后设备将产生一个错误） - The conversion speeds and results of ADC0809 analog-to-digital converter are accurate tested and analyzed by using multi-master clock pulse with different frequency and pulse width.
使用多组不同频率和不同脉宽的工作时钟，定量测定分析ADC0809模数转换器的转换速度和转换结果。 - A Standard Method to Find internal Clock Pulse Overlay Area by Karnaugh Map ── Analysis of Asynchronous Sequential Logic Circuit in the Case or Comples Clock Pulse
利用卡诺图寻找内时钟复盖区的规范方法&复杂时钟下异步时序罗辑电路分析 - The technology of Phase Locked Loop is used to realize synchronization of clock pulse and the test voltage's frequency in order to ensure the measurement of veracity of φ.
另采用锁相环技术实现时钟脉冲与试验电压频率同步，以保证长时间测量时φ值的准确性。 - LED clock-controlled pulse calibrator
LED显示钟控脉冲标定器 - Discussion about the Clock Pulse on the Ripple Sequential Circuits
关于异步时序电路中时钟条件的讨论 - But errors lies in the way of counter lead the bad measurement, especially when it needs high precision or the clock pulse is wider than the difference.
但是由于计数方法本身的误差，在测量精度要求比较高或是在鉴相脉宽小于用于计数的时钟脉冲周期时，原来的测量方法就无法满足实际的测量要求。 - A method for subdividing the grating pulse signal by means of using computer clock pulse is presented in this paper.
本文介绍了一种利用计算机时钟脉冲细分光栅脉冲信号相位的方法&改进型时钟脉冲细分技术。 - To use the way of put a driven circuit behind the pulser, lead through the input of count clock pulse, can avoid the irregular date on the counter during experiment effectively.
在脉冲发生器输出端后加一级驱动电路，再接入计数器的时钟脉冲源输入端，可有效地避免通常发生在实验过程中计数器不规则的跳变。 - Based on the analysis of the existing characteristic equations for a flip-flop controller, a new equation containing the 'clock pulse' variable is proposed.
本文在分析现有触发器特征方程的基础上，提出了把CP输入作为一个输入变量直接与（？） - The cause of the output voltage waveform in the modulation order, the formation of clock pulse disturbance and the influence of operating point parameters on the output voltage waveform are described and the method of regulating operating point parameters is presented.
文中提出了复位损失率的概念，论述了输出电压波形呈现调制状态的原因、时钟脉冲干扰的形成以及工作点参数对输出电压波形的影响，并给出了调节工作点参数的方法。 - Characteristic Equation for Flip-flop with 'Clock Pulse' Variable and Its Application
一个含有CP的触发器特征方程及其应用 - In time-division multiplex analog video signal system, the chrominance signal may be compressed along the time axis with the modulated clock pulse by the luminance signal so that the frequencies of time-compressed signal become homogeneous.
在时分多路复用（TDM）的信号系统中，用调制的取样脉冲沿时间轴压缩色度信号的同时，可使色度信号的频率匀化，从而克服信号的时间压缩与频带扩展的矛盾。 - This paper is on a standard methed how to use Karnaugh map to find internal clock pulse overlay area, in order to standardize and.
讨论了内时钟方程复杂情况下，如何利用卡诺图寻找时钟复盖区的规范方法。 - Principle and Application of Improvement Type Clock Pulse Subdivision Technique
改进型时钟脉冲细分技术原理与应用 - On designing a asynchronous counter, not only the uneffective item, but also that the clock pulse unused should be treated as the laced item.
在异步计数器设计中，除了无效的状态外，凡是时针脉冲不起作用的时刻，电路的状态也应当成约束项来处理。 - Research of eliminating clock& pulse disturbance in CCD
消除CCD时钟干扰的研究 - The IRIG-B decoding device can receive IRIG-B code synchronous clock signals and Pulse Per Second ( PPS). The CPLD hardware data acquisition controller ensures the sample time accuracy in the system.
设计了IRIG-B解码器，可以接收IRIG-B同步时钟信号和PPS脉冲信号，并且设计了CPLD硬件数据采集控制控制器保证采样的时间精度； - Dynamic power dissipation, however, is the energy dissipation caused by the charged or discharged current flowing through the resistance of polysilicon clock line and the series equivalent resistance of the clock electrode when the clock pulse is applied to the device.
动态功耗是由于CCD驱动时钟对时钟电极的串联等效电容或极间电容进行充放电，充放电电流流过多晶硅电极电阻或串联等效电阻引起功率耗散。 - Generation of CCDs Shift Register Clock Pulse by EPROM Circulating Addressing Method
利用EPROM循环寻址方法产生CCD转移时序 - The power that transponder need is come from coupling unit like clock pulse and data.
应答器工作所需的能量，如同时钟脉冲和数据一样，是通过耦合单元传输给应答器的。 - Error analysis of the clock pulse interpolation system for grating signal
光栅信号时钟脉冲细分的误差分析 - The is design of six programs pulse generator& Program pulse duration is 4 times clock pulse interval
六个顺序脉冲发生器的设计&顺序脉冲宽度是时钟脉冲周期的四倍 - A two phase non-overlap clock generator with independent pulse width adjusting is designed to let PH2 borrow 12% of the time from PH1, which relaxes the speed specifications for OTA, comparators and DEM.
设计了一种可独立调节两相脉宽的不交叠时钟产生电路，让PH2相借用PH1相12%的时间，以放宽对运放、比较器和DEM单元的速度要求，节省功耗。 - Using the clock generation board to generate main clock for the modules which generate pulse signals; Meanwhile Designing and realizing the synchronous clock for counting when pulse wants to be delayed. 3.
利用已有时钟板产生脉冲发生模块产生产生脉冲信号时的系统时钟；同时设计并实现同步时钟作为脉冲延迟的计数时钟。 - Light source adopted clock pulse wide band source. The system integrates time division multiplexing and wavelength division multiplexing. Different cladding diameter fiber works as sensing probe. It can realize measurement of strain and temperature simultaneously.
光源为时钟脉冲宽带光源，结合时分、波分和空分复用技术，采用不同包层直径光纤相熔接的应变补偿法传感头设计方案，解决温度和应变交叉敏感问题实现应变和温度同时测量。